Ivarix / Skill Centre

Closing the gap between classroom and chip.

The Ivarix Skill Centre trains students on the full ASIC design flow and embedded firmware, the exact stacks our R&D runs on, so they leave industry-ready.

ASIC role tracks

Train for a real role, not a syllabus.

Each track maps to an actual job in the semiconductor design flow, with hands-on projects that produce portfolio-grade work.

RTL

RTL Design

Digital design in Verilog/SystemVerilog, from spec to synthesizable RTL.

DV

Design Verification

UVM, testbenches and coverage, proving silicon works before tape-out.

PD

Physical Design

Floorplanning, place & route, timing closure and the path to GDSII.

DFT

Design for Test

Scan, ATPG and testability so manufactured chips can be verified.

AMS

Analog / Mixed-Signal

Foundations of analog design and the digital-analog boundary.

FW

Embedded & Firmware

Bare-metal C, RTOS, drivers and bring-up on real embedded targets.

The model

How the training works.

Enrol

Pick a role-based track aligned to where you want to work.

Train

Hands-on, role-based cohorts taught on industry tools and flows.

Build

Ship real projects tied to live engineering problems.

Launch

Step into ASIC and embedded roles, portfolio in hand.

Join the skill centre

Students, start here.

Drop your email to hear about upcoming cohorts and training sessions.

Or email contact@ivarixtechnologies.com